Travelled to:1 × France
2 × USA
Collaborated with:Y.Lin Y.Hsieh Y.Hsu M.Lin H.Perng J.Li H.Huang J.Chen C.Su C.Wu C.Cheng S.Chen H.Lin
Talks about:cell (3) generat (2) layout (2) hierarch (1) densiti (1) channel (1) automat (1) system (1) scheme (1) reduct (1)
Person: Chi-Yi Hwang
DBLP: Hwang:Chi=Yi
Contributed to:
2002
19911990Wrote 4 papers:
- DATE-2002-LiHCSWCCHL #design
- A Hierarchical Test Scheme for System-On-Chip Designs (JFL, HJH, JBC, CPS, CWW, CC, SIC, CYH, HPL), pp. 486–490.
- DAC-1991-HwangHLH #automation #generative #layout #performance
- An Efficient Layout Style for 2-Metal CMOS Leaf Cells And Their Automatic Generation (CYH, YCH, YLL, YCH), pp. 481–486.
- DAC-1991-LinPHL #reduction
- Channel Density Reduction by Routing Over The Cells (MSL, HWP, CYH, YLL), pp. 120–125.
- DAC-1990-HsiehHLH #generative #layout #named
- LiB: A Cell Layout Generator (YCH, CYH, YLL, YCH), pp. 474–479.