Travelled to:
1 × France
1 × Germany
4 × USA
Collaborated with:
Y.Hsu T.Wu C.Hwang C.Hwang A.C.Wu W.Cheng Y.Hsieh C.Chen J.Lin H.Su T.Tien M.Lin H.Perng C.Huang Y.Chen
Talks about:
layout (3) cell (3) schedul (2) generat (2) method (2) path (2) data (2) base (2) resynthesi (1) multimedia (1)
Person: Youn-Long Lin
DBLP: Lin:Youn=Long
Contributed to:
Wrote 11 papers:
- DATE-2005-ChenLL #integration #layout #multi #verification
- Integration, Verification and Layout of a Complex Multimedia SOC (CLC, JYL, YLL), pp. 1116–1117.
- DAC-1999-SuWL #interactive
- A Timing-Driven Soft-Macro Resynthesis Method in Interaction with Chip Floorplanning (HPS, ACHW, YLL), pp. 262–267.
- DAC-1995-ChengL #approach #optimisation
- A Transformation-Based Approach for Storage Optimization (WKC, YLL), pp. 158–163.
- DAC-1995-WuL
- Register Minimization beyond Sharing among Variables (TYW, YLL), pp. 164–169.
- EDAC-1994-WuTWL #behaviour #synthesis
- A Synthesis Method for Mixed Synchronous / Asynchronous Behavior (TYW, TCT, ACHW, YLL), pp. 277–281.
- DAC-1991-HwangHL #functional #pipes and filters #scheduling
- Scheduling for Functional Pipelining and Loop Winding (CTH, YCH, YLL), pp. 764–769.
- DAC-1991-HwangHLH #automation #generative #layout #performance
- An Efficient Layout Style for 2-Metal CMOS Leaf Cells And Their Automatic Generation (CYH, YCH, YLL, YCH), pp. 481–486.
- DAC-1991-LinPHL #reduction
- Channel Density Reduction by Routing Over The Cells (MSL, HWP, CYH, YLL), pp. 120–125.
- DAC-1990-HsiehHLH #generative #layout #named
- LiB: A Cell Layout Generator (YCH, CYH, YLL, YCH), pp. 474–479.
- DAC-1990-HuangCLH
- Data Path Allocation Based on Bipartite Weighted Matching (CYH, YSC, YLL, YCH), pp. 499–504.
- DAC-1990-HwangHL #constraints #heuristic #scheduling
- Optimum and Heuristic Data Path Scheduling Under Resource Constraints (CTH, YCH, YLL), pp. 65–70.