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Travelled to:
1 × France
Collaborated with:
E.Barke H.Gräb L.Hedrich S.Heinen R.Popp S.Steinhorst Y.Wang
Talks about:
approach (1) circuit (1) formal (1) analog (1) verif (1)

Person: Darius Grabowski

DBLP DBLP: Grabowski:Darius

Contributed to:

DATE 20092009

Wrote 1 papers:

DATE-2009-BarkeGGHHPSW #formal method #verification
Formal approaches to analog circuit verification (EB, DG, HG, LH, SH, RP, SS, YW), pp. 724–729.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.