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Travelled to:
1 × France
1 × USA
Collaborated with:
S.Heinen Edward Schneider Shanshan Yang A.Atac Z.Chen L.Liao Y.Zhang R.Wunderlich M.Schleyer J.H.Müller E.Barke D.Grabowski H.Gräb L.Hedrich R.Popp S.Steinhorst
Talks about:
methodolog (2) system (2) verif (2) base (2) multistandard (1) standard (1) prototyp (1) function (1) approach (1) virtual (1)

Person: Yifan Wang

DBLP DBLP: Wang:Yifan

Contributed to:

DAC 20142014
DATE 20092009
DiGRA 20072007

Wrote 4 papers:

DAC-2014-AtacCLWSZWH #design #multi #standard
An HDL-Based System Design Methodology for Multistandard RF SoC’s (AA, ZC, LL, YW, MS, YZ, RW, SH), p. 6.
DAC-2014-ChenWLZAMWH #functional #multi #prototype #standard #verification
A SystemC Virtual Prototyping based Methodology for Multi-Standard SoC Functional Verification (ZC, YW, LL, YZ, AA, JHM, RW, SH), p. 6.
DATE-2009-BarkeGGHHPSW #formal method #verification
Formal approaches to analog circuit verification (EB, DG, HG, LH, SH, RP, SS, YW), pp. 724–729.
DiGRA-2007-SchneiderWY #game studies #video
Exploring the Uncanny Valley with Japanese Video Game Characters (ES, YW, SY).

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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