BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × USA
1 × United Kingdom
Collaborated with:
S.D.Brown A.C.Ling V.Manohararajah
Talks about:
fpga (3) synthesi (2) technolog (1) increment (1) quantifi (1) satisfi (1) boolean (1) physic (1) studi (1) retim (1)

Person: Deshanand P. Singh

DBLP DBLP: Singh:Deshanand_P=

Contributed to:

DAC 20052005
SAT 20052005

Wrote 3 papers:

DAC-2005-LingSB #case study
FPGA technology mapping: a study of optimality (ACL, DPS, SDB), pp. 427–432.
DAC-2005-SinghMB #incremental #physics #synthesis
Incremental retiming for FPGA physical synthesis (DPS, VM, SDB), pp. 433–438.
SAT-2005-LingSB #logic #quantifier #satisfiability #synthesis #using
FPGA Logic Synthesis Using Quantified Boolean Satisfiability (ACL, DPS, SDB), pp. 444–450.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.