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Collaborated with:
C.W.Barrett S.Mitra
Talks about:
silicon (1) method (1) formal (1) electr (1) detect (1) valid (1) quick (1) local (1) error (1) enabl (1)

Person: Eshan Singh

DBLP DBLP: Singh:Eshan

Contributed to:

CAV (2) 20172017

Wrote 1 papers:

CAV-2017-SinghBM #debugging #detection #fault #formal method #locality #named #validation
E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods (ES, CWB, SM), pp. 104–125.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.