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Travelled to:
1 × Canada
1 × France
1 × Germany
1 × USA
Collaborated with:
S.X.Tan X.Liu X.Peng Z.Xing W.Zhao S.Swarup H.Yu A.Gupta Q.Jiang G.Zhang S.Jiang
Talks about:
power (3) thermal (2) acceler (2) manag (2) code (2) gpu (2) microprocessor (1) evolutionari (1) trajectori (1) placement (1)

Person: Hai Wang

DBLP DBLP: Wang:Hai

Contributed to:

SANER 20152015
ASE 20132013
DATE 20132013
DATE 20122012

Wrote 6 papers:

SANER-2015-JiangPWXZ
Summarizing Evolutionary Trajectory by Grouping and Aggregating relevant code changes (QJ, XP, HW, ZX, WZ), pp. 361–370.
ASE-2013-ZhangPXJWZ #monitoring #on-demand #towards
Towards contextual and on-demand code clone management by continuous monitoring (GZ, XP, ZX, SJ, HW, WZ), pp. 497–507.
DATE-2013-WangTSL #algorithm
A power-driven thermal sensor placement algorithm for dynamic thermal management (HW, SXDT, SS, XL), pp. 1215–1220.
DATE-2012-LiuTW #analysis #approach #graph #parallel #statistics
Parallel statistical analysis of analog circuits by GPU-accelerated graph-based approach (XL, SXDT, HW), pp. 852–857.
DATE-2012-LiuTWY #simulation
A GPU-accelerated envelope-following method for switching power converter simulation (XL, SXDT, HW, HY), pp. 1349–1354.
DATE-2012-WangTLG #runtime
Runtime power estimator calibration for high-performance microprocessors (HW, SXDT, XL, AG), pp. 352–357.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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