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Travelled to:
1 × France
1 × USA
Collaborated with:
Y.Chen W.Wen H.Li J.Yang Y.Zhang J.Hu D.Wang Y.Zhang S.Li
Talks about:
system (3) storag (3) flash (3) nand (3) protect (2) techniqu (1) disturb (1) reduct (1) latenc (1) hybrid (1)

Person: Jie Guo

DBLP DBLP: Guo:Jie

Contributed to:

DAC 20152015
DATE 20132013

Wrote 3 papers:

DAC-2015-GuoWHWLC #design #latency #named #novel #reduction
FlexLevel: a novel NAND flash storage system design for LDPC latency reduction (JG, WW, JH, DW, HL, YC), p. 6.
DATE-2013-GuoWLLLC #named
DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems (JG, WW, YZ, SL, HL, YC), pp. 380–385.
DATE-2013-GuoYZC #hybrid #low cost
Low cost power failure protection for MLC NAND flash storage systems with PRAM/DRAM hybrid buffer (JG, JY, YZ, YC), pp. 859–864.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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