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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × Germany
2 × France
2 × USA
Collaborated with:
Y.Chen W.Wen H.Li M.Mao B.Yan W.Wu H.H.Li Y.Wang Y.Xie X.Wang Y.Li A.K.Jones E.Eken R.V.Joshi J.Guo S.Li
Talks about:
ram (5) stt (4) design (3) reliabl (2) system (2) memori (2) high (2) architectur (1) racetrack (1) asymmetri (1)

Person: Yaojun Zhang

DBLP DBLP: Zhang:Yaojun

Contributed to:

DATE 20152015
DAC 20142014
DATE 20132013
DAC 20122012
DATE 20122012

Wrote 7 papers:

DATE-2015-ZhangYWLC #design #logic #power management
Giant spin hall effect (GSHE) logic design for low power application (YZ, BY, WW, HL, YC), pp. 1000–1005.
DAC-2014-EkenZWJLC #self
A New Field-assisted Access Scheme of STT-RAM with Self-reference Capability (EE, YZ, WW, RVJ, HL, YC), p. 6.
DAC-2014-MaoWZCL #architecture #memory management #using
Exploration of GPGPU Register File Architecture Using Domain-wall-shift-write based Racetrack Memory (MM, WW, YZ, YC, HHL), p. 6.
DAC-2014-WenZMC #design #memory management #strict
State-Restrict MLC STT-RAM Designs for High-Reliable High-Performance Memory System (WW, YZ, MM, YC), p. 6.
DATE-2013-GuoWLLLC #named
DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems (JG, WW, YZ, SL, HL, YC), pp. 380–385.
DAC-2012-WenZCWX #analysis #named #performance #reliability #scalability #statistics
PS3-RAM: a fast portable and scalable statistical STT-RAM reliability analysis method (WW, YZ, YC, YW, YX), pp. 1191–1196.
DATE-2012-ZhangWLJC #design #symmetry
Asymmetry of MTJ switching and its implication to STT-RAM designs (YZ, XW, YL, AKJ, YC), pp. 1313–1318.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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