BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × France
Collaborated with:
C.Lee J.Lin M.C.Lin W.C.Wu W.Y.Lin
Talks about:
circuit (3) effici (2) simul (2) fault (2) distribut (1) sequenti (1) feedback (1) diagnosi (1) pattern (1) scheme (1)

Person: Jwu E. Chen

DBLP DBLP: Chen:Jwu_E=

Contributed to:

DATE 20022002

Wrote 3 papers:

DATE-2002-LinLC #feedback #performance
An Efficient Test and Diagnosis Scheme for the Feedback Type of Analog Circuits with Minimal Added Circuits (JWL, CLL, JEC), p. 1119.
EDAC-1994-LinCL #fault #named #performance
TRANS: A Fast and Memory-Efficient Path Delay Fault Simulator (MCL, JEC, CLL), pp. 508–512.
EDAC-1994-WuLCL #clustering #distributed #fault #simulation
Distributed Fault Simulation for Sequential Circuits by Pattern Partitioning (WCW, CLL, JEC, WYL), p. 661.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.