Travelled to:1 × China
Collaborated with:Y.Kim V.Seshadri O.Mutlu B.Jaiyen D.Lee J.Liu
Talks about:latenc (2) dram (2) low (2) architectur (1) predict (1) perform (1) system (1) provid (1) memori (1) improv (1)
Person: Lavanya Subramanian
DBLP: Subramanian:Lavanya
Contributed to:
2013Wrote 2 papers:
- HPCA-2013-LeeKSLSM #architecture #latency #low cost
- Tiered-latency DRAM: A low latency and low cost DRAM architecture (DL, YK, VS, JL, LS, OM), pp. 615–626.
- HPCA-2013-SubramanianSKJM #in memory #memory management #named #performance #predict
- MISE: Providing performance predictability and improving fairness in shared main memory systems (LS, VS, YK, BJ, OM), pp. 639–650.