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Travelled to:
1 × France
2 × Germany
Collaborated with:
S.Guilley J.Danger Y.Souissi S.Bhasin G.Duc L.Sauvage Y.Mathieu
Talks about:
fpga (2) cryptoprocessor (1) countermeasur (1) constraint (1) precharg (1) without (1) success (1) against (1) offset (1) global (1)

Person: Maxime Nassar

DBLP DBLP: Nassar:Maxime

Contributed to:

DATE 20122012
DATE 20102010
DATE 20092009

Wrote 3 papers:

DATE-2012-NassarSGD #named #performance
RSM: A small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs (MN, YS, SG, JLD), pp. 1173–1178.
DATE-2010-NassarBDDG #evaluation #named
BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation (MN, SB, JLD, GD, SG), pp. 849–854.
DATE-2009-SauvageGDMN #constraints
Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints (LS, SG, JLD, YM, MN), pp. 640–645.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.