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Travelled to:
2 × USA
Collaborated with:
M.Pellauer J.S.Emer D.Chiou M.A.Kinsy A.Parashar
Talks about:
multiplex (1) multicor (1) problem (1) modular (1) hardwar (1) connect (1) address (1) detail (1) design (1) simul (1)

Person: Michael Adler

DBLP DBLP: Adler:Michael

Contributed to:

HPCA 20112011
DAC 20092009

Wrote 2 papers:

HPCA-2011-PellauerAKPE #manycore #named #simulation #using
HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing (MP, MA, MAK, AP, JSE), pp. 406–417.
DAC-2009-PellauerACE #composition #problem
Soft connections: addressing the hardware-design modularity problem (MP, MA, DC, JSE), pp. 276–281.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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