Proceedings of the 17th International Conference on High-Performance Computer Architecture
HPCA, 2011.
@proceedings{HPCA-2011, address = "San Antonio, Texas, USA", ee = "http://www.computer.org/csdl/proceedings/hpca/2011/9432/00/index.html", isbn = "978-1-4244-9432-3", publisher = "{IEEE Computer Society}", title = "{Proceedings of the 17th International Conference on High-Performance Computer Architecture}", year = 2011, }
Contents (48 items)
- HPCA-2011-Larus #programming
- Programming the cloud (JRL), p. 1.
- HPCA-2011-RanganPWB #performance #throughput
- Achieving uniform performance and maximizing throughput in the presence of heterogeneity (KKR, MDP, GYW, DMB), pp. 3–14.
- HPCA-2011-RanjanLMG #clustering #concurrent #multi #named #thread
- Fg-STP: Fine-Grain Single Thread Partitioning on Multicores (RR, FL, PM, AG), pp. 15–24.
- HPCA-2011-FungA #concurrent #control flow #performance #thread
- Thread block compaction for efficient SIMT control flow (WWLF, TMA), pp. 25–36.
- HPCA-2011-GhasemiDK #architecture #using
- Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors (HRG, SCD, NSK), pp. 38–49.
- HPCA-2011-SmullenMNGS #energy #performance
- Relaxing non-volatility for fast and energy-efficient STT-RAM caches (CWSI, VM, AN, SG, MRS), pp. 50–61.
- HPCA-2011-BhattacharjeeLM #multi
- Shared last-level TLBs for chip multiprocessors (AB, DL, MM), pp. 62–63.
- HPCA-2011-BlakeDM #scheduling #transaction
- Bloom Filter Guided Transaction Scheduling (GB, RGD, TNM), pp. 75–86.
- HPCA-2011-MehraraHSM #javascript #parallel #using
- Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism (MM, PCH, MS, SAM), pp. 87–98.
- HPCA-2011-LeeTST #fine-grained #multi #named #thread
- HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor (SL, DT, YS, JT), pp. 99–110.
- HPCA-2011-GuLKS #named
- MOPED: Orchestrating interprocess message data on CMPs (JG, SSL, RK, YS), pp. 111–120.
- HPCA-2011-NittaFA #network
- Addressing system-level trimming issues in on-chip nanophotonic networks (CN, MKF, VA), pp. 122–131.
- HPCA-2011-VantreaseLB #protocol
- Atomic Coherence: Leveraging nanophotonics to build race-free cache coherence protocols (DV, MHL, NLB), pp. 132–143.
- HPCA-2011-FallinCM #named
- CHIPPER: A low-complexity bufferless deflection router (CF, CC, OM), pp. 144–155.
- HPCA-2011-LiHL0DTW #network
- Power shifting in Thrifty Interconnection Network (JL, WH, CL, LZ, WED, RRT, KW), pp. 156–167.
- HPCA-2011-FerdmanLBF #manycore #scalability
- Cuckoo directory: A scalable directory for many-core systems (MF, PLK, KB, BF), pp. 169–180.
- HPCA-2011-TsengT #thread
- Data-triggered threads: Eliminating redundant computation (HWT, DMT), pp. 181–192.
- HPCA-2011-BrownPT #concurrent #migration #performance #predict #set #thread
- Fast thread migration via cache working set prediction (JAB, LP, DMT), pp. 193–204.
- HPCA-2011-LiZCL #architecture #energy #manycore #named #power management
- SolarCore: Solar energy driven multi-core architecture power management (CL, WZ, CBC, TL), pp. 205–216.
- HPCA-2011-McKinley #how #parallel #question
- How’s the parallel computing revolution going? (KSM), p. 217.
- HPCA-2011-LeeCC #named
- CloudCache: Expanding and shrinking private caches (HL, SC, BRC), pp. 219–230.
- HPCA-2011-SrikantaiahKZKIX #adaptation #configuration management #multi #named
- MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy (SS, EK, TZ, MTK, MJI, YX), pp. 231–242.
- HPCA-2011-ManikantanRG #distance #manycore #named #performance
- NUcache: An efficient multicore cache organization based on Next-Use distance (RM, KR, RG), pp. 243–253.
- HPCA-2011-LiaoZB #architecture #network
- A new server I/O architecture for high speed networks (GL, XZ, LNB), pp. 255–265.
- HPCA-2011-ChenLZ #memory management #parallel #performance
- Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing (FC, RL, XZ), pp. 266–277.
- HPCA-2011-YangR #array #named
- I-CASH: Intelligently Coupled Array of SSD and HDD (QY, JR), pp. 278–289.
- HPCA-2011-MadanBBA #manycore #power management
- A case for guarded power gating for multi-core processors (NM, AB, PB, MA), pp. 291–300.
- HPCA-2011-OuyangNWFP
- Beyond block I/O: Rethinking traditional storage primitives (XO, DWN, RW, DF, DKP), pp. 301–311.
- HPCA-2011-HouZHWFGC #challenge #data type #performance #streaming
- Efficient data streaming with on-chip accelerators: Opportunities and challenges (RH, LZ, MCH, KW, HF, YG, XC), pp. 312–320.
- HPCA-2011-CarreteroVARMG #hardware #process #using
- Hardware/software-based diagnosis of load-store queues using expandable activity logs (JC, XV, JA, TR, MM, AG), pp. 321–331.
- HPCA-2011-HowerDHW #named
- Calvin: Deterministic or not? Free will to choose (DH, PD, MDH, DAW), pp. 333–334.
- HPCA-2011-JoshiZL #energy #memory management #multi #named #performance
- Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system (MJ, WZ, TL), pp. 345–356.
- HPCA-2011-LeeSNY #analysis #order
- Offline symbolic analysis to infer Total Store Order (DL, MS, SN, ZY), pp. 357–358.
- HPCA-2011-BobbaLHW #memory management #performance
- Safe and efficient supervised memory systems (JB, ML, MDH, DAW), pp. 369–380.
- HPCA-2011-ZhangO #analysis #architecture #gpu #performance
- A quantitative performance analysis model for GPU architectures (YZ, JDO), pp. 382–393.
- HPCA-2011-JacobsonBBAE #abstraction #architecture #modelling #scalability
- Abstraction and microarchitecture scaling in early-stage power modeling (HMJ, AB, PB, EA, RJE), pp. 394–405.
- HPCA-2011-PellauerAKPE #manycore #named #simulation #using
- HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing (MP, MA, MAK, AP, JSE), pp. 406–417.
- HPCA-2011-AndersonFCE #architecture #javascript #mobile
- Checked Load: Architectural support for JavaScript type-checking on mobile processors (OA, EF, LC, SJE), pp. 419–430.
- HPCA-2011-RobatmiliGBK #distributed
- Exploiting criticality to reduce bottlenecks in distributed uniprocessors (BR, MSSG, DB, SWK), pp. 431–442.
- HPCA-2011-Seznec #branch #estimation #predict
- Storage free confidence estimation for the TAGE branch predictor (AS), pp. 443–454.
- HPCA-2011-JiangS #architecture #framework #operating system
- Architectural framework for supporting operating system survivability (XJ, YS), pp. 456–465.
- HPCA-2011-YoonMCRJE #fault #memory management #named
- FREE-p: Protecting non-volatile memory against both hard and soft errors (DHY, NM, JC, PR, NPJ, ME), pp. 466–477.
- HPCA-2011-QureshiSLF #detection #online
- Practical and secure PCM systems by online detection of malicious write streams (MKQ, AS, LL, MF), pp. 478–489.
- HPCA-2011-SampsonVGGST #performance
- Efficient complex operators for irregular codes (JS, GV, NGH, SG, SS, MBT), pp. 491–502.
- HPCA-2011-GovindarajuHS #energy #performance
- Dynamically Specialized Datapaths for energy efficient computing (VG, CHH, KS), pp. 503–514.
- HPCA-2011-LiuLNMMH #hardware
- Hardware/software techniques for DRAM thermal management (SL, BL, AN, SOM, GM, NH), pp. 515–525.
- HPCA-2011-JiangMZIFSMBD #named #scheduling #symmetry
- ACCESS: Smart scheduling for asymmetric cache CMPs (XJ, AKM, LZ, RI, ZF, SS, SM, PB, CRD), pp. 527–538.
- HPCA-2011-AnsariFGM #design #named #polymorphism #robust
- Archipelago: A polymorphic cache design for enabling robust near-threshold operation (AA, SF, SG, SAM), pp. 539–550.
15 ×#named
12 ×#performance
7 ×#architecture
5 ×#manycore
5 ×#multi
5 ×#thread
4 ×#energy
4 ×#memory management
4 ×#using
3 ×#concurrent
12 ×#performance
7 ×#architecture
5 ×#manycore
5 ×#multi
5 ×#thread
4 ×#energy
4 ×#memory management
4 ×#using
3 ×#concurrent