Travelled to:
1 × Austria
1 × Germany
1 × Hungary
1 × Italy
1 × Spain
3 × USA
Collaborated with:
E.M.Clarke H.Veith M.K.Ganai A.Gupta H.Han D.Wang N.Sinha O.Strichman A.Pnueli S.K.Lahiri R.E.Bryant A.Goel O.Grumberg
Talks about:
abstract (4) predic (3) logic (3) approach (2) environ (2) integr (2) domain (2) verif (2) tight (2) small (2)
Person: Muralidhar Talupur
DBLP: Talupur:Muralidhar
Contributed to:
Wrote 10 papers:
- TACAS-2011-TalupurH #model checking #using
- Biased Model Checking Using Flows (MT, HH), pp. 239–253.
- TACAS-2008-ClarkeTV #abstraction #concurrent #framework #model checking #proving
- Proving Ptolemy Right: The Environment Abstraction Framework for Model Checking Concurrent Systems (EMC, MT, HV), pp. 33–47.
- TACAS-2006-GanaiTG #encoding #integration #lazy evaluation #logic #named
- SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in a Separation Logic Solver (MKG, MT, AG), pp. 135–150.
- VMCAI-2006-ClarkeTV #abstraction #verification
- Environment Abstraction for Parameterized Verification (EMC, MT, HV), pp. 126–141.
- CAV-2004-TalupurSSP #logic
- Range Allocation for Separation Logic (MT, NS, OS, AP), pp. 148–161.
- TACAS-2004-LahiriBGT #similarity
- Revisiting Positive Equality (SKL, REB, AG, MT), pp. 1–15.
- CAV-2003-ClarkeGTW #abstraction #how #performance
- Making Predicate Abstraction Efficient: How to Eliminate Redundant Predicates (EMC, OG, MT, DW), pp. 126–140.
- SAT-2003-ClarkeTVW #abstraction #hardware #satisfiability #verification
- SAT Based Predicate Abstraction for Hardware Verification (EMC, MT, HV, DW), pp. 78–92.
- SMT-J-2006-GanaiTG #difference #encoding #integration #lazy evaluation #logic #named
- SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in Solving Difference Logic (MKG, MT, AG), pp. 91–114.