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Travelled to:
1 × Canada
1 × Portugal
1 × Russia
1 × Spain
2 × Germany
2 × United Kingdom
6 × USA
Collaborated with:
S.Krstic R.E.Bryant C.Tinelli S.B.K.Vrudhula W.R.Lee J.Grundy A.Reynolds G.Hasteer R.Leslie M.R.Tuttle S.K.Lahiri M.Talupur S.Conchon A.Mebsout F.Zaïdi A.Fuchs M.Deters C.Barrett
Talks about:
model (6) base (4) smt (4) function (3) analysi (3) theori (3) symbol (3) standard (2) interpol (2) current (2)

Person: Amit Goel

DBLP DBLP: Goel:Amit

Facilitated 1 volumes:

SMT 2012Ed

Contributed to:

CADE 20132013
CAV 20132013
CAV 20122012
SMT 20122012
CADE 20092009
TACAS 20092009
DAC 20082008
DATE 20082008
TACAS 20072007
CAV 20042004
TACAS 20042004
DAC 20032003
DATE 20032003
DAC 20002000

Wrote 14 papers:

CADE-2013-ReynoldsTGKDB #finite #quantifier #smt
Quantifier Instantiation Techniques for Finite Model Finding in SMT (AR, CT, AG, SK, MD, CB), pp. 377–391.
CAV-2013-ReynoldsTGK #finite #smt
Finite Model Finding in SMT (AR, CT, AG, SK), pp. 640–655.
CAV-2012-ConchonGKMZ #model checking #named #parallel #smt
Cubicle: A Parallel SMT-Based Model Checker for Parameterized Systems — Tool Paper (SC, AG, SK, AM, FZ), pp. 718–724.
SMT-2012-GoelKLT #smt #verification
SMT-Based System Verification with DVF (AG, SK, RL, MRT), pp. 32–43.
Ground Interpolation for Combined Theories (AG, SK, CT), pp. 183–198.
TACAS-2009-FuchsGGKT #formal method #similarity
Ground Interpolation for the Theory of Equality (AF, AG, JG, SK, CT), pp. 413–427.
DAC-2008-GoelV #analysis #modelling #standard #statistics
Statistical waveform and current source based standard cell models for accurate timing analysis (AG, SBKV), pp. 227–230.
DATE-2008-GoelV #analysis #standard
Current source based standard cell model for accurate signal integrity and timing analysis (AG, SBKV), pp. 574–579.
TACAS-2007-KrsticGGT #parametricity #satisfiability
Combined Satisfiability Modulo Parametric Theories (SK, AG, JG, CT), pp. 602–617.
CAV-2004-GoelB #abstraction #functional #model checking #order #simulation
Symbolic Simulation, Model Checking and Abstraction with Partially Ordered Boolean Functional Vectors (AG, REB), pp. 255–267.
TACAS-2004-LahiriBGT #similarity
Revisiting Positive Equality (SKL, REB, AG, MT), pp. 1–15.
DAC-2003-GoelHB #order #representation
Symbolic representation with ordered function templates (AG, GH, REB), pp. 431–435.
DATE-2003-GoelB #analysis #functional #reachability #set
Set Manipulation with Boolean Functional Vectors for Symbolic Reachability Analysis (AG, REB), pp. 10816–10821.
DAC-2000-GoelL #verification
Formal verification of an IBM CoreConnect processor local bus arbiter core (AG, WRL), pp. 196–200.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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