Travelled to:1 × France
2 × Germany
Collaborated with:J.J.H.Pontes P.Vivet A.Mello L.Möller F.G.Moraes V.Lomné P.Maurine L.Torres M.Robert R.Soares
Talks about:system (2) design (2) multiprocess (1) reliabl (1) network (1) against (1) robust (1) effect (1) tripl (1) singl (1)
Person: Ney Calazans
DBLP: Calazans:Ney
Contributed to:
201220092004Wrote 3 papers:
- DATE-2012-PontesCV #design #reliability
- An accurate Single Event Effect digital design flow for reliable system level design (JJHP, NC, PV), pp. 224–229.
- DATE-2009-LomneMTRSC #evaluation #logic #robust
- Evaluation on FPGA of triple rail logic robustness against DPA and DEMA (VL, PM, LT, MR, RS, NC), pp. 634–639.
- DATE-2005-MelloMCM04 #multi #named #network
- MultiNoC: A Multiprocessing System Enabled by a Network on Chip (AM, LM, NC, FGM), pp. 234–239.