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Travelled to:
1 × China
1 × USA
Collaborated with:
T.Li B.Cao Y.Xu R.Wang L.Gao D.Qian
Talks about:
architectur (2) memori (2) throughput (1) transact (1) softwar (1) perform (1) resist (1) power (1) optim (1) core (1)

Person: Nilanjan Goswami

DBLP DBLP: Goswami:Nilanjan

Contributed to:

CGO 20142014
HPCA 20132013

Wrote 2 papers:

CGO-2014-XuWGLGQ #architecture #gpu #memory management #transaction
Software Transactional Memory for GPU Architectures (YX, RW, NG, TL, LG, DQ), p. 1.
HPCA-2013-GoswamiCL #architecture #memory management #throughput #using
Power-performance co-optimization of throughput core architecture using resistive memory (NG, BC, TL), pp. 342–353.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.