Travelled to:1 × Germany
2 × USA
Collaborated with:M.Bombana G.Zaza S.Conigliaro R.B.Hughes G.Musgrave G.Buonanno F.Ferrandi D.Sciuto D.Gajski E.Villar W.Rosenstiel V.Gerousis D.Barton J.Plantin S.E.Ericsson G.G.d.Jong
Talks about:synthesi (1) progress (1) function (1) deadlock (1) testabl (1) circuit (1) analysi (1) system (1) specif (1) expert (1)
Person: Patrizia Cavalloro
DBLP: Cavalloro:Patrizia
Contributed to:
2001
1995
1993Wrote 3 papers:
- DATE-2001-GajskiVRGBPECJ #concurrent #specification
- C/C++: progress or deadlock in system-level specification (DG, EV, WR, VG, DB, JP, SEE, PC, GGdJ), pp. 136–137.
- DAC-1995-BombanaCCHMZ #case study #synthesis
- Design-Flow and Synthesis for ASICs: A Case Study (MB, PC, SC, RBH, GM, GZ), pp. 292–297.
- SEKE-1993-BombanaBCFSZ #analysis #functional #testing
- An Expert Solution to Functional Testability Analysis of VLSI Circuits (MB, GB, PC, FF, DS, GZ), pp. 263–265.