Travelled to:1 × France
1 × Spain
1 × USA
3 × Germany
Collaborated with:F.Herrera H.Posadas P.Sánchez A.López M.Veiga A.Jantsch C.Grimm T.Kogel F.Blasco D.Gajski W.Rosenstiel V.Gerousis D.Barton J.Plantin S.E.Ericsson P.Cavalloro G.G.d.Jong
Talks about:system (10) specif (3) level (3) embed (3) softwar (2) use (2) specifiact (1) heterogen (1) framework (1) progress (1)
Person: Eugenio Villar
DBLP: Villar:Eugenio
Contributed to:
2008
2006200420032001
1999Wrote 6 papers:
- DATE-2008-VillarJGK #specification #using
- Heterogeneous System-level Specification Using SystemC (EV, AJ, CG, TK).
- DAC-2006-HerreraV #embedded #framework #modelling #specification
- A framework for embedded system specification under different models of computation in SystemC (FH, EV), pp. 911–914.
- DATE-v1-2004-PosadasHSVB #analysis #performance
- System-Level Performance Analysis in SystemC (HP, FH, PS, EV, FB), pp. 378–383.
- DATE-2003-HerreraPSV #embedded #generative
- Systemic Embedded Software Generation from SystemC (FH, HP, PS, EV), pp. 10142–10149.
- DATE-2001-GajskiVRGBPECJ #concurrent #specification
- C/C++: progress or deadlock in system-level specification (DG, EV, WR, VG, DB, JP, SEE, PC, GGdJ), pp. 136–137.
- AdaEurope-1999-LopezVV #ada #design #embedded #hardware #using
- Hardware/Software Embedded System Specifiaction and Design Using Ada and VHDL (AL, MV, EV), pp. 356–370.