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Travelled to:
1 × France
Collaborated with:
S.S.Khursheed B.M.Al-Hashimi
Talks about:
multipl (1) voltag (1) reduct (1) design (1) defect (1) bridg (1) test (1) size (1) gate (1) cost (1)

Person: Peter Harrod

DBLP DBLP: Harrod:Peter

Contributed to:

DATE 20092009

Wrote 1 papers:

DATE-2009-KhursheedAH #design #fault #multi #reduction
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing (SSK, BMAH, PH), pp. 1349–1354.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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