BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
2 × USA
Collaborated with:
Y.Lee A.Waterman K.Asanovic Z.Tan H.Cook D.A.Patterson J.Bachrach H.Vo B.Richards J.Wawrzynek
Talks about:
multiprocessor (1) architectur (1) construct (1) languag (1) hardwar (1) chisel (1) simul (1) scala (1) embed (1) ramp (1)

Person: Rimas Avizienis

DBLP DBLP: Avizienis:Rimas

Contributed to:

DAC 20122012
DAC 20102010

Wrote 2 papers:

DAC-2012-BachrachVRLWAWA #embedded #hardware #named #scala
Chisel: constructing hardware in a Scala embedded language (JB, HV, BR, YL, AW, RA, JW, KA), pp. 1216–1225.
DAC-2010-TanWALCPA #architecture #multi
RAMP gold: an FPGA-based architecture simulator for multiprocessors (ZT, AW, RA, YL, HC, DAP, KA), pp. 463–468.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.