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Travelled to:
1 × China
2 × USA
Collaborated with:
K.Asanovic A.Waterman R.Avizienis R.Krashinsky V.Grover S.W.Keckler Z.Tan H.Cook D.A.Patterson J.Bachrach H.Vo B.Richards J.Wawrzynek
Talks about:
architectur (2) multiprocessor (1) construct (1) parallel (1) languag (1) hardwar (1) converg (1) scalar (1) chisel (1) simul (1)

Person: Yunsup Lee

DBLP DBLP: Lee:Yunsup

Contributed to:

CGO 20132013
DAC 20122012
DAC 20102010

Wrote 3 papers:

CGO-2013-LeeKGKA #architecture #convergence
Convergence and scalarization for data-parallel architectures (YL, RK, VG, SWK, KA), p. 11.
DAC-2012-BachrachVRLWAWA #embedded #hardware #named #scala
Chisel: constructing hardware in a Scala embedded language (JB, HV, BR, YL, AW, RA, JW, KA), pp. 1216–1225.
DAC-2010-TanWALCPA #architecture #multi
RAMP gold: an FPGA-based architecture simulator for multiprocessors (ZT, AW, RA, YL, HC, DAP, KA), pp. 463–468.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.