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Travelled to:
1 × Germany
3 × USA
Collaborated with:
D.E.Thomas K.W.Batcher E.M.Dirkes J.V.Rajan J.A.Nestor R.L.Blackburn
Talks about:
system (3) workbench (1) transform (1) represent (1) architect (1) synthesi (1) behavior (1) schedul (1) design (1) round (1)

Person: Robert A. Walker

DBLP DBLP: Walker:Robert_A=

Contributed to:

DATE 20082008
DAC 19881988
DAC 19851985
DAC 19831983

Wrote 4 papers:

DATE-2008-BatcherW #embedded #scheduling
Dynamic Round-Robin Task Scheduling to Reduce Cache Misses for Embedded Systems (KWB, RAW), pp. 260–263.
DAC-1988-ThomasDWRNB #architecture
The System Architect’s Workbench (DET, EMD, RAW, JVR, JAN, RLB), pp. 337–343.
DAC-1985-WalkerT #design #representation #synthesis
A model of design representation and synthesis (RAW, DET), pp. 453–459.
DAC-1983-WalkerT #behaviour
Behavioral level transformation in the CMU-DA system (RAW, DET), pp. 788–789.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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