Travelled to:1 × Turkey
3 × USA
Collaborated with:D.E.Thomas B.Ilbeyi G.Krishnamoorthy E.M.Dirkes R.A.Walker J.V.Rajan R.L.Blackburn
Talks about:cach (2) multilevel (1) workbench (1) represent (1) processor (1) implement (1) architect (1) visual (1) system (1) extend (1)
Person: John A. Nestor
DBLP: Nestor:John_A=
Contributed to:
2010
199219881982Wrote 4 papers:
- ITiCSE-2010-IlbeyiN #named #visualisation
- VCache: visualization applet for processor caches (BI, JAN), p. 304.
- DAC-1992-KrishnamoorthyN #using
- Data Path Allocation using an Extended Binding Model (GK, JAN), pp. 279–284.
- DAC-1988-ThomasDWRNB #architecture
- The System Architect’s Workbench (DET, EMD, RAW, JVR, JAN, RLB), pp. 337–343.
- DAC-1982-NestorT #design #implementation #multi #representation #simulation
- Defining and implementing a multilevel design representation with simulation applications (JAN, DET), pp. 740–746.