Travelled to:
1 × India
5 × USA
Collaborated with:
W.W.Hwu M.Delahaye S.Ryoo S.S.Stone N.Vasudevan Y.Wu I.Gelado C.I.Rodrigues S.J.Patel Y.Dotsenko B.Lloyd N.K.Govindaraju S.Ueng W.D.Gropp D.B.Kirk J.A.Stratton J.H.Kelm R.E.Kidd A.Mahesri S.C.Tsao N.Navarro S.S.Lumetta M.I.Frank
Talks about:
multithread (3) perform (3) gpu (3) processor (2) program (2) graphic (2) optim (2) model (2) evalu (2) auto (2)
Person: Sara S. Baghsorkhi
DBLP: Baghsorkhi:Sara_S=
Contributed to:
Wrote 7 papers:
- PPoPP-2012-BaghsorkhiGDH #evaluation #memory management #parallel #performance #thread
- Efficient performance evaluation of memory hierarchy for highly multithreaded graphics processors (SSB, IG, MD, WmWH), pp. 23–34.
- PPoPP-2011-DotsenkoBLG #fourier #performance
- Auto-tuning of fast fourier transform on graphics processors (YD, SSB, BL, NKG), pp. 257–266.
- PPoPP-2010-BaghsorkhiDPGH #adaptation #architecture #gpu #modelling #performance
- An adaptive performance modeling tool for GPU architectures (SSB, MD, SJP, WDG, WmWH), pp. 105–114.
- CGO-2008-RyooRSBUSH #gpu #optimisation #parallel #thread
- Program optimization space pruning for a multithreaded gpu (SR, CIR, SSS, SSB, SZU, JAS, WmWH), pp. 195–204.
- PPoPP-2008-RyooRBSKH #evaluation #gpu #optimisation #parallel #performance #thread #using
- Optimization principles and application performance evaluation of a multithreaded GPU using CUDA (SR, CIR, SSB, SSS, DBK, WmWH), pp. 73–82.
- DAC-2007-HwuRUKGSKBMTNLFP #modelling #parallel #programming
- Implicitly Parallel Programming Models for Thousand-Core Microprocessors (WmWH, SR, SZU, JHK, IG, SSS, REK, SSB, AM, SCT, NN, SSL, MIF, SJP), pp. 754–759.
- PLDI-2016-BaghsorkhiVW #named
- FlexVec: auto-vectorization for irregular loops (SSB, NV, YW), pp. 697–710.