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Travelled to:
1 × France
3 × USA
Collaborated with:
W.W.Hwu S.S.Baghsorkhi M.Delahaye N.Navarro S.J.Patel N.Rajovic A.Rico J.Vipond N.Puzovic A.Ramírez J.Cabezas J.E.Stone S.Ryoo S.Ueng J.H.Kelm S.S.Stone R.E.Kidd A.Mahesri S.C.Tsao S.S.Lumetta M.I.Frank
Talks about:
processor (2) parallel (2) memori (2) effici (2) model (2) microprocessor (1) multithread (1) hierarchi (1) heterogen (1) distribut (1)

Person: Isaac Gelado

DBLP DBLP: Gelado:Isaac

Contributed to:

DATE 20132013
PPoPP 20122012
ASPLOS 20102010
DAC 20072007

Wrote 4 papers:

DATE-2013-RajovicRVGPR #case study #energy #experience #mobile #performance
Experiences with mobile processors for energy efficient HPC (NR, AR, JV, IG, NP, AR), pp. 464–468.
PPoPP-2012-BaghsorkhiGDH #evaluation #memory management #parallel #performance #thread
Efficient performance evaluation of memory hierarchy for highly multithreaded graphics processors (SSB, IG, MD, WmWH), pp. 23–34.
ASPLOS-2010-GeladoCNSPH #distributed #memory management #parallel #symmetry
An asymmetric distributed shared memory model for heterogeneous parallel systems (IG, JC, NN, JES, SJP, WmWH), pp. 347–358.
DAC-2007-HwuRUKGSKBMTNLFP #modelling #parallel #programming
Implicitly Parallel Programming Models for Thousand-Core Microprocessors (WmWH, SR, SZU, JHK, IG, SSS, REK, SSB, AM, SCT, NN, SSL, MIF, SJP), pp. 754–759.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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