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Travelled to:
1 × USA
Collaborated with:
J.Yim C.Kyung
Talks about:
methodolog (1) floorplan (1) distribut (1) power (1) clock (1) plan (1) base (1) asic (1)

Person: Seong-Ok Bae

DBLP DBLP: Bae:Seong=Ok

Contributed to:

DAC 19991999

Wrote 1 papers:

DAC-1999-YimBK
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs (JSY, SOB, CMK), pp. 766–771.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.