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Travelled to:
3 × France
Collaborated with:
S.Vassiliadis A.Gheolbanoiu L.Petrica S.Wong A.M.Molnos M.J.M.Heijligers J.T.J.v.Eijndhoven D.Crisu P.Liuha
Talks about:
acceler (2) reconfigur (1) multimedia (1) processor (1) framework (1) composit (1) graphic (1) develop (1) system (1) memori (1)

Person: Sorin Cotofana

DBLP DBLP: Cotofana:Sorin

Contributed to:

DATE 20152015
DATE v1 20042004
DATE v2 20042004
PDP 20012001

Wrote 4 papers:

DATE-2015-GheolbanoiuPC #adaptation #hybrid
Hybrid adaptive clock management for FPGA processor acceleration (AG, LP, SC), pp. 1359–1364.
DATE-v1-2004-MolnosHCE #composition #data-driven #memory management
Compositional Memory Systems for Data Intensive Applications (AMM, MJMH, SC, JTJvE), pp. 728–729.
DATE-v2-2004-CrisuCVL #development #embedded #framework #named
GRAAL — A Development Framework for Embedded Graphics Accelerators (DC, SC, SV, PL), pp. 1366–1367.
PDP-2001-WongCV #configuration management #multi
Coarse Reconfigurable Multimedia Unit Extension (SW, SC, SV), pp. 235–242.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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