BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
1 × USA
Collaborated with:
D.J.Lilja D.Mathaikutty S.K.Shukla A.Dingankar J.J.Yi R.Sendag D.M.Hawkins
Talks about:
microprocessor (1) character (1) techniqu (1) prevail (1) generat (1) direct (1) design (1) compar (1) valid (1) simul (1)

Person: Sreekumar V. Kodakara

DBLP DBLP: Kodakara:Sreekumar_V=

Contributed to:

DATE 20072007
HPCA 20052005

Wrote 2 papers:

DATE-2007-MathaikuttySKLD #design #fault #generative #testing #validation
Design fault directed test generation for microprocessor validation (DM, SKS, SVK, DJL, AD), pp. 761–766.
HPCA-2005-YiKSLH #simulation
Characterizing and Comparing Prevailing Simulation Techniques (JJY, SVK, RS, DJL, DMH), pp. 266–277.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.