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Travelled to:
1 × Japan
1 × Spain
1 × Sweden
1 × The Netherlands
3 × France
3 × Germany
4 × USA
Collaborated with:
R.K.Gupta H.D.Patel J.Talpin F.Doucet H.B.H.III D.J.Rosenkrantz E.G.Daylight H.Yu P.Joshi P.L.Guernic J.Brandt K.Schneider R.A.Bergamaschi P.Schaumont I.Verbauwhede S.Irani N.Savoiu Q.Guo P.Narendran M.Otsuka R.E.Stearns S.Shiraishi D.Mathaikutty S.V.Kodakara D.J.Lilja A.Dingankar M.R.Mousavi T.Basten D.Bhaduri D.Coker V.E.Taylor P.S.Graham M.Gokhale S.Rawat B.Bailey D.K.Beece M.Fujita C.Pixley J.O'Leary F.Somenzi
Talks about:
design (10) system (9) model (7) level (5) framework (3) concurr (3) valid (3) architectur (2) synchron (2) behavior (2)

Person: Sandeep K. Shukla

DBLP DBLP: Shukla:Sandeep_K=

Contributed to:

DAC 20152015
SAC 20152015
LCTES 20102010
FM 20092009
DAC 20072007
DATE 20072007
DATE 20062006
DATE v1 20042004
DAC 20032003
DATE 20032003
DATE 20022002
RTA 19981998
CAV 19961996
ICALP 19961996

Wrote 20 papers:

DAC-2015-YuJTSS #challenge #integration #modelling
The challenge of interoperability: model-based integration for automotive control software (HY, PJ, JPT, SKS, SS), p. 6.
SAC-2015-JoshiSIY #architecture #behaviour #design #embedded #functional #modelling
Mapping functional behavior onto architectural model in a model driven embedded system design (PJ, SKS, JPT, HY), pp. 1624–1630.
LCTES-2010-BrandtSS #concurrent #specification
Translating concurrent action oriented specifications to synchronous guarded actions (JB, KS, SKS), pp. 47–56.
FM-2009-DaylightS #case study #design #on the
On the Difficulties of Concurrent-System Design, Illustrated with a 2×2 Switch Case Study (EGD, SKS), pp. 273–288.
DAC-2007-PatelS #design #modelling #validation
Model-driven Validation of SystemC Designs (HDP, SKS), pp. 29–34.
DATE-2007-MathaikuttySKLD #design #fault #generative #testing #validation
Design fault directed test generation for microprocessor validation (DM, SKS, SVK, DJL, AD), pp. 761–766.
DATE-2007-PatelS #abstraction
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL (HDP, SKS), pp. 279–284.
DATE-2006-BhaduriSCTGG #analysis #architecture #design #fault tolerance #framework #hybrid
A hybrid framework for design and analysis of fault-tolerant architectures (DB, SKS, DC, VET, PSG, MG), pp. 335–336.
DATE-2006-PatelSB #behaviour #design
Heterogeneous behavioral hierarchy for system level designs (HDP, SKS, RAB), pp. 565–570.
DATE-2006-SchaumontSV #design #hardware #semantics
Design with race-free hardware semantics (PS, SKS, IV), pp. 571–576.
DATE-v1-2004-MousaviGTSB #design #framework #modelling #validation
Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks (MRM, PLG, JPT, SKS, TB), pp. 384–389.
DAC-2003-GuptaRSBBFPOS #verification
Formal verification — prove it or pitch it (RKG, SR, SKS, BB, DKB, MF, CP, JO, FS), pp. 710–711.
DATE-2003-DoucetSG #framework
Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated (FD, SKS, RKG), pp. 10382–10387.
DATE-2003-TalpinGSGD #design
Polychrony for Refinement-Based Design (JPT, PLG, SKS, RKG, FD), pp. 11172–11173.
DATE-2002-DoucetSGO #co-evolution #component #composition #design #performance
An Environment for Dynamic Component Composition for Efficient Co-Design (FD, SKS, RKG, MO), pp. 736–743.
DATE-2002-IraniGS #analysis #multi #power management
Competitive Analysis of Dynamic Power Management Strategies for Systems with Multiple Power Savings States (SI, RKG, SKS), pp. 117–123.
DATE-2002-SavoiuSG #automation #concurrent #modelling #performance #simulation
Automated Concurrency Re-Assignment in High Level System Models for Efficient System-Level Simulation (NS, SKS, RKG), pp. 875–881.
RTA-1998-GuoNS #algebra #process #unification
Unification and Matching in Process Algebras (QG, PN, SKS), pp. 91–105.
CAV-1996-ShuklaHR #game studies #model checking #verification
HORNSAT, Model Checking, Verification and games (SKS, HBHI, DJR), pp. 99–110.
ICALP-1996-ShuklaHRS #complexity #finite #on the #problem #process #relational
On the Complexity of Relational Problems for Finite State Processes (SKS, HBHI, DJR, RES), pp. 466–477.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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