BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × USA
Collaborated with:
G.Steele D.Overhauser S.Z.Hussain V.Veetil D.Sylvester D.Blaauw S.Shah
Talks about:
full (2) chip (2) distribut (1) analysi (1) variat (1) system (1) method (1) leakag (1) effici (1) depend (1)

Person: Steffen Rochel

DBLP DBLP: Rochel:Steffen

Contributed to:

DAC 20092009
DAC 19981998

Wrote 2 papers:

DAC-2009-VeetilSBSR #analysis #dependence #performance
Efficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependence (VV, DS, DB, SS, SR), pp. 154–159.
DAC-1998-SteeleORH #verification
Full-Chip Verification Methods for DSM Power Distribution Systems (GS, DO, SR, SZH), pp. 744–749.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.