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Travelled to:
1 × USA
Collaborated with:
M.Kurimoto H.Suzuki R.Akiyama H.Ohkuma H.Takata H.Shinohara
Talks about:
voltag (1) scheme (1) driven (1) detect (1) adjust (1) stage (1) slack (1) scale (1) phase (1) optim (1)

Person: Tadao Yamanaka

DBLP DBLP: Yamanaka:Tadao

Contributed to:

DAC 20082008

Wrote 1 papers:

DAC-2008-KurimotoSAYOTS #detection #fault #optimisation #scalability
Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling (MK, HS, RA, TY, HO, HT, HS), pp. 884–889.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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