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Travelled to:
1 × France
Collaborated with:
G.Eneman J.Cho D.Milojevic M.Choi K.D.Meyer A.Mercha E.Beyne T.Hoffmann G.V.d.Plas
Talks about:
configur (1) silicon (1) multipl (1) compact (1) stress (1) analyt (1) model (1) estim (1)

Person: V. Moroz

DBLP DBLP: Moroz:V=

Contributed to:

DATE 20112011

Wrote 1 papers:

DATE-2011-EnemanCMMCMMBHP #estimation #multi
An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations (GE, JC, VM, DM, MC, KDM, AM, EB, TH, GVdP), pp. 505–506.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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