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Travelled to:
1 × France
1 × Germany
Collaborated with:
S.Yoo K.Choi G.Lee N.Zergainoh J.Lee J.Jung K.Rha
Talks about:
processor (1) optimist (1) communic (1) softwar (1) schedul (1) hardwar (1) coverif (1) analysi (1) execut (1) design (1)

Person: Youngchul Cho

DBLP DBLP: Cho:Youngchul

Contributed to:

DATE 20032003
DATE 20002000

Wrote 2 papers:

DATE-2003-ChoLYCZ #analysis #communication #design #scheduling
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design (YC, GL, SY, KC, NEZ), pp. 20132–20137.
DATE-2000-YooLJRCC #execution #performance
Fast Hardware-Software Coverification by Optimistic Execution of Real Processor (SY, JeL, JJ, KR, YC, KC), pp. 663–668.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.