Travelled to:1 × France
3 × Germany
Collaborated with:M.Nicolaidis T.Bonnoit D.Avresky F.Chaix A.Baghdadi D.Lyonnard A.A.Jerraya T.Maurin Y.Sorel C.Lavarenne Y.Cho G.Lee S.Yoo K.Choi L.Anghel Y.Zorian T.Karnik K.A.Bowman J.Tschanz S.Lu C.Tokunaga A.Raychowdhury M.M.Khellah J.Kulkarni V.De
Talks about:design (4) multiprocessor (2) applic (2) time (2) chip (2) interconnect (1) architectur (1) implement (1) systemat (1) deadlock (1)
Person: Nacer-Eddine Zergainoh
DBLP: Zergainoh:Nacer=Eddine
Contributed to:
2012201120032001
1994Wrote 6 papers:
- DATE-2012-NicolaidisAZZKBTLTRKKDA #design #reliability
- Design for test and reliability in ultimate CMOS (MN, LA, NEZ, YZ, TK, KAB, JT, SLL, CT, AR, MMK, JK, VD, DA), pp. 677–682.
- DATE-2011-ChaixAZN #adaptation #concurrent #fault tolerance
- A fault-tolerant deadlock-free adaptive routing for on chip interconnects (FC, DA, NEZ, MN), pp. 909–912.
- DATE-2011-NicolaidisBZ
- Eliminating speed penalty in ECC protected memories (MN, TB, NEZ), pp. 1614–1619.
- DATE-2003-ChoLYCZ #analysis #communication #design #scheduling
- Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design (YC, GL, SY, KC, NEZ), pp. 20132–20137.
- DATE-2001-BaghdadiLZJ #architecture #design #multi #performance
- An efficient architecture model for systematic design of application-specific multiprocessor SoC (AB, DL, NEZ, AAJ), pp. 55–63.
- PDP-1994-ZergainohMYL #design #development #implementation #multi #realtime
- A Real Time Multiprocessor Application Development Environment Design And Implementation (NEZ, TM, YS, CL), pp. 544–550.