Travelled to:2 × USA
Collaborated with:S.Sastry M.Pedram S.B.K.Vrudhula
Talks about:decomposit (1) synthesi (1) hierarch (1) function (1) diagram (1) binari (1) applic (1) verif (1) multi (1) logic (1)
Person: Yung-Te Lai
DBLP: Lai:Yung=Te
Contributed to:
19931992Wrote 2 papers:
- DAC-1993-LaiPV #composition #logic #synthesis
- BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis (YTL, MP, SBKV), pp. 642–647.
- DAC-1992-LaiS #diagrams #multi #verification
- Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification (YTL, SS), pp. 608–613.