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Travelled to:
1 × China
1 × USA
Collaborated with:
S.Mao T.Tjahjadi G.R.Thoma X.Chen H.Kim P.V.Gratz J.Hu M.Kishinevsky Ü.Y.Ogras R.Z.Ayoub
Talks about:
processor (1) recognit (1) multicor (1) frequenc (1) document (1) resourc (1) voltag (1) entiti (1) design (1) style (1)

Person: Zheng Xu

DBLP DBLP: Xu:Zheng

Contributed to:

DAC 20132013
ICPR v1 20062006

Wrote 2 papers:

DAC-2013-ChenXKGHKOA #design #manycore #scalability
Dynamic voltage and frequency scaling for shared resources in multicore processor designs (XC, ZX, HK, PVG, JH, MK, ÜYO, RZA), p. 7.
ICPR-v1-2006-MaoXTT #documentation #image #logic #multi #recognition
Logical Entity Recognition in Multi-Style Document Page Images (SM, ZX, TT, GRT), pp. 876–879.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.