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Used together with:
softwar (12)
hardwar (11)
system (7)
architectur (3)
virtual (3)

Stem codesign$ (all stems)

22 papers:

DACDAC-2013-HoC #multi
Multiple chip planning for chip-interposer codesign (YKH, YWC), p. 6.
DATEDATE-2011-FoucauldDDC
An antenna-filter codesign for cardiac implants (EdF, JBD, CD, PC), pp. 728–733.
DATEDATE-2007-MossNFFBA #hardware #performance #simulation
Seamless hardware/software performance co-monitoring in a codesign simulation environment with RTOS support (LM, MdN, LF, SF, GB, EMA), pp. 876–881.
DATEDATE-2006-KlingaufGG #architecture #named #transaction
TRAIN: a virtual transaction layer architecture for TLM-based HW/SW codesign of synthesizable MPSoC (WK, HG, RG), pp. 1318–1323.
DATEDATE-v1-2004-ZambrenoCSN #flexibility #hardware #using
Flexible Software Protection Using Hardware/Software Codesign Techniques (JZ, ANC, RS, BN), pp. 636–641.
DACDAC-2002-SuHSN #network
Congestion-driven codesign of power and signal networks (HS, JH, SSS, SRN), pp. 64–69.
DATEDATE-2002-PaulT #approach #modelling #virtual machine
A Layered, Codesign Virtual Machine Approach to Modeling Computer Systems (JMP, DET), pp. 522–528.
LCTESLCTES-SCOPES-2002-WahlenGNHLM #architecture #case study #compilation
Application specific compiler/architecture codesign: a case study (OW, TG, AN, AH, RL, HM), pp. 185–193.
DACDAC-2000-PaulPT #hardware #modelling #virtual machine
A codesign virtual machine for hierarchical, balanced hardware/software system modeling (JMP, SNP, DET), pp. 390–395.
DATEDATE-2000-BaleaniFST
HW/SW Codesign of an Engine Management System (MB, AF, ALSV, CT), pp. 263–267.
DATEDATE-2000-MoyaMLD #flexibility #framework #specification
A Flexible Specification Framework for Hardware-Software Codesign (JMM, FM, JCL, SD), p. 753.
DACDAC-1999-FleischmannBK #embedded #java #prototype
Java Driven Codesign and Prototyping of Networked Embedded Systems (JF, KB, RK), pp. 794–797.
DATEDATE-1999-FleischmannBK #component #configuration management #embedded #hardware #java
Codesign of Embedded Systems Based on Java and Reconfigurable Hardware Components (JF, KB, RK), pp. 768–769.
DATEDATE-1999-HamiltonOH
Self Recovering Controller and Datapath Codesign (SNH, AO, AH), pp. 596–601.
DATEDATE-1999-MaestroMH #approach #hardware #problem
The Heterogeneous Structure Problem in Hardware/Software Codesign: A Macroscopic Approach (JAM, DM, RH), pp. 766–767.
DATEDATE-1998-MaestroMM #clustering #estimation #hardware #parallel #process
A Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process (JAM, DM, HM), pp. 218–225.
DACDAC-1997-HartoogRRDDHK #generative #hardware #tool support
Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign (MRH, JAR, PDR, SD, DDD, EAH, NK), pp. 303–306.
CAVCAV-1997-Hughes #approach #verification
Formal Verification of Digital Systems, from ASICs to HW/SW Codesign — a Pragmatic Approach (RBH), pp. 3–6.
DACDAC-1996-SuzukiS #estimation #hardware #performance
Efficient Software Performance Estimation Methods for Hardware/Software Codesign (KS, ALSV), pp. 605–610.
DACDAC-1995-ManciniYB
A Methodology for HW-SW Codesign in ATM (GM, DY, SB), pp. 520–527.
ICSEICSE-1991-FrankeP #hardware #perspective
Hardware/Software Codesign: A Perspective (DWF, MKP), pp. 344–352.
DACDAC-1985-SmithFC #architecture #assessment #design #hardware
An architecture design and assessment system for software/hardware codesign (CUS, GAF, JLC), pp. 417–424.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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