BibSLEIGH corpus
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Used together with:
flip (12)
slack (3)
low (3)
base (3)
scan (3)

Stem flop$ (all stems)

12 papers:

DATEDATE-2014-LinZH #low cost
A low-cost radiation hardened flip-flop (YL, MZ, BH), pp. 1–6.
DATEDATE-2014-NejatAA #power management #process
Dynamic Flip-Flop conversion to tolerate process variation in low power circuits (MN, BA, AAK), pp. 1–4.
DATEDATE-2013-LuL #multi
Slack budgeting and slack to length converting for multi-bit flip-flop merging (CCL, RBL), pp. 1837–1842.
DATEDATE-2013-SarrazinENBG #concurrent #design #detection #fault #performance
Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detection (SS, SE, LAdBN, YB, VG), pp. 1077–1082.
DATEDATE-2012-LiuLC #optimisation
Agglomerative-based flip-flop merging with signal wirelength optimization (SYL, CJL, HMC), pp. 1391–1396.
DACDAC-2008-KurimotoSAYOTS #detection #fault #optimisation #scalability
Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling (MK, HS, RA, TY, HO, HT, HS), pp. 884–889.
Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits (JS, JK, YS), pp. 103–106.
DATEDATE-2007-XuRC #analysis #interactive #pipes and filters #power management
Interactive presentation: Analysis of power consumption and BER of flip-flop based interconnect pipelining (JX, AR, MHC), pp. 1218–1223.
Flip-Flop and Repeater Insertion for Early Interconnect Planning (RL, GZ, CKK, KYC), pp. 690–695.
Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection (FC, PP, MSR, MV), pp. 670–677.
DACDAC-1994-ChakradharBA #algorithm
An Exact Algorithm for Selecting Partial Scan Flip-Flops (STC, AB, VDA), pp. 81–86.
DACDAC-1978-Evans #simulation
Accurate simulation of flip-flop timing characteristics (DJE), pp. 398–404.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.