Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems
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Manish Arora, Srilatha Manne, Indrani Paul, Nuwan Jayasena, Dean M. Tullsen
Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems
HPCA, 2015.

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@inproceedings{HPCA-2015-AroraMPJT,
	author        = "Manish Arora and Srilatha Manne and Indrani Paul and Nuwan Jayasena and Dean M. Tullsen",
	booktitle     = "{Proceedings of the 21st International Symposium on High-Performance Computer Architecture}",
	doi           = "10.1109/HPCA.2015.7056047",
	isbn          = "978-1-4799-8930-0",
	pages         = "366--377",
	publisher     = "{IEEE}",
	title         = "{Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems}",
	year          = 2015,
}

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