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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
K.Roy A.Raghunathan S.Venkataramani X.Fong A.Raha S.G.Ramasubramanian R.Venkatesan V.S.Pai
Talks about:
approxim (2) memori (2) synthesi (1) spintron (1) sequenti (1) dyrectap (1) configur (1) circuit (1) storag (1) energi (1)

Person: Ashish Ranjan

DBLP DBLP: Ranjan:Ashish

Contributed to:

DAC 20152015
DATE 20152015
DATE 20142014

Wrote 3 papers:

DAC-2015-RanjanVFRR #approximate #energy #performance
Approximate storage for energy efficient spintronic memories (AR, SV, XF, KR, AR), p. 6.
DATE-2015-RanjanRVPRR #configuration management #memory management #named #using
DyReCTape: a dynamically reconfigurable cache using domain wall memory tapes (AR, SGR, RV, VSP, KR, AR), pp. 181–186.
DATE-2014-RanjanRVRR #approximate #named #synthesis
ASLAN: Synthesis of approximate sequential circuits (AR, AR, SV, KR, AR), pp. 1–6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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