BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × France
5 × USA
Collaborated with:
B.Franzini P.McNamara M.Bertoletti N.Dragone S.Saxena M.Chinosi R.Zafalon C.Forzan A.D.Fabbro L.Croce M.Malcotti P.Schumaker D.Coder P.Azzoni F.Fummi W.Vendraminetto L.Daldoss S.Zanella W.Xiang S.Liu M.Casale-Rossi A.J.Strojwas R.C.Aitken A.Domic P.Magarshack D.Pattullo J.Sawicki N.A.Sherwani S.L.Mack A.Alexanian P.Buch H.Lehon P.Rabkin A.Sharan
Talks about:
dfm (3) standard (2) circuit (2) effect (2) analog (2) simul (2) optim (2) digit (2) accur (2) cell (2)

Person: Carlo Guardiani

DBLP DBLP: Guardiani:Carlo

Contributed to:

DATE 20072007
DAC 20052005
DATE 20022002
DAC 20002000
DAC 19991999
DAC 19971997
DAC 19951995

Wrote 9 papers:

DATE-2007-AzzoniBDFGV #optimisation
Yield-aware placement optimization (PA, MB, ND, FF, CG, WV), pp. 1232–1237.
DATE-2007-Casale-RossiSADGMPS #named #product line #question #trust
DFM/DFY: should you trust the surgeon or the family doctor? (MCR, AJS, RCA, AD, CG, PM, DP, JS), pp. 439–442.
DAC-2005-GuardianiBDMM #effectiveness #process
An effective DFM strategy requires accurate process and IP pre-characterization (CG, MB, ND, MM, PM), pp. 760–761.
DAC-2005-SherwaniMABGLRS #exclamation
DFM rules! (NAS, SLM, AA, PB, CG, HL, PR, AS), pp. 168–169.
DATE-2002-GuardianiMDSZXL #optimisation #testing
Analog IP Testing: Diagnosis and Optimization (CG, PM, LD, SS, SZ, WX, SL), pp. 192–196.
DAC-2000-GaurdianiSMSC #bound #component #constant #simulation #statistics
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component mismatch effects (CG, SS, PM, PS, DC), pp. 15–18.
DAC-1999-ChinosiZG #clustering #parallel #simulation
Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning (MC, RZ, CG), pp. 562–567.
DAC-1997-ForzanFG #megamodelling #performance #standard
Accurate and Efficient Macromodel of Submicron Digital Standard Cells (CF, BF, CG), pp. 633–637.
DAC-1995-FabbroFCG #modelling #probability #standard #worst-case
An Assigned Probability Technique to Derive Realistic Worst-Case Timing Models of Digital Standard Cells (ADF, BF, LC, CG), pp. 702–706.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.