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Travelled to:
1 × Cyprus
1 × Finland
1 × Italy
1 × Sweden
1 × Taiwan
1 × United Kingdom
2 × France
2 × Spain
3 × Germany
7 × USA
Collaborated with:
J.C.Browne V.Levin K.Hao S.Ray T.Ball K.Cong Z.Yang L.Lei J.Li J.Yang R.P.Kurshan C.McGarvey Y.Chen G.Yang X.Song M.A.Perkowski B.C.0008 C.Havlicek R.Kannavara
Talks about:
check (11) softwar (9) system (6) model (6) synthesi (5) behavior (5) design (5) hardwar (4) equival (4) automat (3)

Person: Fei Xie

DBLP DBLP: Xie:Fei

Contributed to:

ISSTA 20152015
DAC 20142014
DATE 20142014
DAC 20132013
DAC 20122012
ASE 20112011
FASE 20112011
CAV 20102010
DATE 20102010
FASE 20102010
DATE 20092009
DAC 20082008
CBSE 20062006
CIAA 20062006
FASE 20042004
TACAS 20042004
ESEC/FSE 20032003
FME 20032003
FASE 20022002
ASE 20012001
FASE 20182018

Wrote 24 papers:

ISSTA-2015-CongLYX #automation #fault #injection #robust #testing
Automatic fault injection for driver robustness testing (KC, LL, ZY, FX), pp. 361–372.
DAC-2014-YangHCLRX #behaviour #certification #framework #scalability #synthesis
Scalable Certification Framework for Behavioral Synthesis Front-End (ZY, KH, KC, LL, SR, FX), p. 6.
DATE-2014-CongLYX #evaluation #prototype #testing #validation
Coverage evaluation of post-silicon validation tests with virtual prototypes (KC, LL, ZY, FX), pp. 1–6.
DATE-2014-HaoRX #behaviour #equivalence #pipes and filters #synthesis
Equivalence checking for function pipelining in behavioral synthesis (KH, SR, FX), pp. 1–6.
DAC-2013-LeiXC #consistency #prototype
Post-silicon conformance checking with virtual prototypes (LL, FX, KC), p. 6.
DAC-2013-YangRHX #behaviour #design #equivalence #implementation #optimisation #synthesis
Handling design and implementation optimizations in equivalence checking for behavioral synthesis (ZY, SR, KH, FX), p. 6.
DAC-2012-HaoRX #behaviour #equivalence #pipes and filters
Equivalence checking for behaviorally synthesized pipelines (KH, SR, FX), pp. 344–349.
ASE-2011-LiXBLM #formal method #hardware #interface #specification
Formalizing hardware/software interface specifications (JL, FX, TB, VL, CM), pp. 143–152.
FASE-2011-LiXBL #automaton #model checking
Model Checking Büchi Pushdown Systems (JL, FX, TB, VL), pp. 141–155.
CAV-2010-LiXBL #analysis #automaton #hardware #performance #reachability
Efficient Reachability Analysis of Büchi Pushdown Systems for Hardware/Software Co-verification (JL, FX, TB, VL), pp. 339–353.
DATE-2010-HaoXRY #behaviour #equivalence #optimisation #synthesis
Optimizing equivalence checking for behavioral synthesis (KH, FX, SR, JY), pp. 1500–1505.
FASE-2010-LiXBLM #approach #hardware
An Automata-Theoretic Approach to Hardware/Software Co-verification (JL, FX, TB, VL, CM), pp. 248–262.
DATE-2009-HaoX #component #design #hardware #interface
Componentizing hardware/software interface design (KH, FX), pp. 232–237.
DAC-2008-ChenXY #abstraction #automation #evaluation #optimisation #refinement
Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation (YC, FX, JY), pp. 143–148.
CBSE-2006-XieB #component #product line #verification
Verification of Component-Based Software Application Families (FX, JCB), pp. 50–66.
CIAA-2006-YangXSP #hybrid #quantum #synthesis
Universality of Hybrid Quantum Gates and Synthesis Without Ancilla Qudits (GY, FX, XS, MAP), pp. 279–280.
FASE-2004-XieLKB #design #model checking
Translating Software Designs for Model Checking (FX, VL, RPK, JCB), pp. 324–338.
TACAS-2004-BallLX #automation #modelling
Automatic Creation of Environment Models via Training (TB, VL, FX), pp. 93–107.
ESEC-FSE-2003-XieB #component #composition
Verified systems by composition from verified components (FX, JCB), pp. 277–286.
FME-2003-XieBK #composition #reasoning
Translation-Based Compositional Reasoning for Software Systems (FX, JCB, RPK), pp. 582–599.
FASE-2002-XieB #design #execution #model checking #object-oriented #reduction
Integrated State Space Reduction for Model Checking Executable Object-Oriented Software System Designs (FX, JCB), pp. 64–79.
FASE-2002-XieLB #design #execution #model checking #named #object-oriented
ObjectCheck: A Model Checking Tool for Executable Object-Oriented Software System Designs (FX, VL, JCB), pp. 331–335.
ASE-2001-XieLB #execution #model checking #set #uml
Model Checking for an Executable Subset of UML (FX, VL, JCB), pp. 333–336.
FASE-2018-ChenHYCKX #framework #named #testing
CRETE: A Versatile Binary-Level Concolic Testing Framework (BC0, CH, ZY, KC, RK, FX), pp. 281–298.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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