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Travelled to:
1 × USA
Collaborated with:
W.Che K.S.Chatha
Talks about:
system (2) architectur (1) synthesi (1) process (1) stream (1) memori (1) mpsoc (1) level (1) sub (1)

Person: Glenn Leary

DBLP DBLP: Leary:Glenn

Contributed to:

DAC 20122012

Wrote 1 papers:

DAC-2012-LearyCC #architecture #memory management #synthesis
System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC (GL, WC, KSC), pp. 672–677.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.