Travelled to:1 × France
1 × USA
Collaborated with:Z.Wang M.Lai L.Gao K.Dai L.Huang L.Shen N.Xiao C.Liu
Talks about:architectur (1) processor (1) virtual (1) special (1) congest (1) channel (1) vector (1) router (1) buffer (1) embed (1)
Person: Hongyi Lu
DBLP: Lu:Hongyi
Contributed to:
2011
2008Wrote 2 papers:
- DATE-2011-HuangWSLXL #embedded #low cost
- A specialized low-cost vectorized loop buffer for embedded processors (LH, ZW, LS, HL, NX, CL), pp. 1200–1203.
- DAC-2008-LaiWGLD #architecture
- A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers (McL, ZW, LG, HL, KD), pp. 630–633.