Travelled to:1 × Brazil
1 × France
1 × Germany
1 × India
1 × USA
Collaborated with:Z.Wang L.Shen N.Xiao ∅ Y.Lü H.Lu C.Liu W.Shi S.Ma J.Guo M.Lai Z.Pang F.Chen K.Dai
Talks about:processor (3) multi (2) heterogen (1) techniqu (1) multicor (1) implicit (1) hierarch (1) special (1) predict (1) overcom (1)
Person: Libo Huang
DBLP: Huang:Libo
Contributed to:
20142011
2010
2008
2008Wrote 5 papers:
- DATE-2014-Huang14a #manycore #network #performance #predict
- Leveraging on-chip networks for efficient prediction on multicore coherence (LH), pp. 1–4.
- DATE-2011-HuangWSLXL #embedded #low cost
- A specialized low-cost vectorized loop buffer for embedded processors (LH, ZW, LS, HL, NX, CL), pp. 1200–1203.
- HPCA-2010-HuangSWSXM #named #permutation
- SIF: Overcoming the limitations of SIMD devices via implicit permutation (LH, LS, ZW, WS, NX, SM), pp. 1–12.
- DAC-2008-LuSHWX #effectiveness #multi #optimisation
- Customizing computation accelerators for extensible multi-issue processors with effective optimization techniques (YSL, LS, LH, ZW, NX), pp. 197–200.
- SAC-2008-GuoLPHCDW #design #manycore #memory management
- Hierarchical memory system design for a heterogeneous multi-core processor (JG, McL, ZP, LH, FC, KD, ZW), pp. 1504–1508.