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Travelled to:
1 × Germany
2 × France
Collaborated with:
A.Cilardo A.Mazzeo E.Fusella N.Mazzocca
Talks about:
system (2) base (2) multidimension (1) interconnect (1) interplay (1) synthesi (1) communic (1) schedul (1) scalabl (1) partit (1)

Person: Luca Gallo

DBLP DBLP: Gallo:Luca

Contributed to:

DATE 20152015
DATE 20142014
DATE 20132013

Wrote 3 papers:

DATE-2015-CilardoG #clustering #memory management #multi
Interplay of loop unrolling and multidimensional memory partitioning in HLS (AC, LG), pp. 163–168.
DATE-2014-CilardoFGM #communication #manycore #scheduling #synthesis
Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems (AC, EF, LG, AM), pp. 1–4.
DATE-2013-CilardoGMM #design #performance #scalability
Efficient and scalable OpenMP-based system-level design (AC, LG, AM, NM), pp. 988–991.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.