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Travelled to:
1 × Germany
1 × Mexico
2 × USA
Collaborated with:
J.M.García J.Fernández J.R.T.Gil J.Duato G.Bernabé R.F.Pascual J.González J.L.Abellán A.Flores J.L.Aragón J.M.G.Carrasco E.Gaona-Ramírez J.Franco A.Negi P.Stenström J.F.Peinador D.Bertozzi D.Bortolotti A.Marongiu L.Benini
Talks about:
memori (4) architectur (3) transact (3) hardwar (3) multiprocessor (2) directori (2) synchron (2) communic (2) scalabl (2) energi (2)

Person: Manuel E. Acacio

DBLP DBLP: Acacio:Manuel_E=

Contributed to:

DATE 20122012
HPCA 20122012
PDP 20122012
PDP 20102010
PDP 20092009
PDP 20082008
HPCA 20072007
PDP 20052005
PDP 20022002
HPCA 20012001

Wrote 11 papers:

DATE-2012-AbellanPABBMB #clustering #communication #design #framework
Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs (JLA, JFP, MEA, DB, DB, AM, LB), pp. 491–496.
HPCA-2012-NegiGAGS #hardware #lazy evaluation #memory management #named #scalability #transaction
π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory (AN, JRTG, MEA, JMG, PS), pp. 141–152.
PDP-2012-Gaona-RamirezGAF #energy #hardware #memory management #transaction
Dynamic Serialization: Improving Energy Consumption in Eager-Eager Hardware Transactional Memory Systems (EGR, JRTG, MEA, JF), pp. 221–228.
PDP-2010-FloresAA #energy #hardware #using
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects (AF, JLA, MEA), pp. 147–154.
PDP-2009-FrancoBFA #2d #implementation #parallel #using
A Parallel Implementation of the 2D Wavelet Transform Using CUDA (JF, GB, JF, MEA), pp. 111–118.
PDP-2008-AbellanFA #communication #named
CellStats: A Tool to Evaluate the Basic Synchronization and Communication Operations of the Cell BE (JLA, JF, MEA), pp. 261–268.
PDP-2008-GilSC #memory management #transaction
Characterization of Conflicts in Log-Based Transactional Memory (LogTM) (JRTG, MEA, JMGC), pp. 30–37.
HPCA-2007-PascualGAD #architecture #fault tolerance #protocol
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures (RFP, JMG, MEA, JD), pp. 157–168.
PDP-2005-FernandezGBA #3d #architecture #optimisation #thread #video
Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures (RFP, JMG, GB, MEA), pp. 76–83.
PDP-2002-AcacioGGD #integration #latency #multi
Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration (MEA, JG, JMG, JD), pp. 368–375.
HPCA-2001-AcacioGGD #architecture #multi #scalability
A New Scalable Directory Architecture for Large-Scale Multiprocessors (MEA, JG, JMG, JD), pp. 97–106.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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