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Travelled to:
1 × France
Collaborated with:
O.Schliebusch A.Chattopadhyay R.Leupers G.Ascheid H.Meyr G.Braun A.Nohl
Talks about:
architectur (1) processor (1) implement (1) synthesi (1) explor (1) rtl (1)

Person: Mario Steinert

DBLP DBLP: Steinert:Mario

Contributed to:

DATE DF 20042004

Wrote 1 papers:

DATE-DF-2004-SchliebuschCLAMSBN #architecture #implementation #synthesis
RTL Processor Synthesis for Architecture Exploration and Implementation (OS, AC, RL, GA, HM, MS, GB, AN), pp. 156–160.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.